Stress Hysteresis Measurement up to 500C for thermal property and stability tests of thin films in inert gas. Non-Contact Laser Scanning Technology.

Local and Lattice Stress Measurement, Die level Topography. For in-die and in-device stress and composition control.

Virtual Interface Technology for 3D-IC Metrology: TSV profile (depth, top & bottom CD) , Remaining Silicon Thickness (RST), Copper Nail Height, Bump Height and Cu pillar Height, Edge trim profile.

Film adhesion testing of thin films and stacks on substrates for material evaluation.

Silicon Concepts is the leading manufacturer of stress measurement tools for semiconductor, MEMS, optoelectronic, and flat panel applications. Stress and wafer bow maps can be acquired over the entire wafer surface, providing process engineers means to characterize and develop new processes using different thin film materials.

The SIC 128 Series systems are room temperature,  full-wafer 2D/3D stress mapping systems. 128 systems use SIC's patented non-contact Opti-Lever dual-laser auto-switching technology. Ability to scan 1000 points per inch in seconds for high resolution, high precision stress mapping on blanked and patterned wafers.

Stress Hysteresis in vacuum or gas up to 900C for the study of annealing cycles. Thermal Desorption, Film Shrinkage, Reflectivity, and Resistivity options provide additional insight to causes of material changes with temperature. NEW: Optional wafer rotation offers unique 2D/3D mapping to study wafer deformation as a function of temperature.

Contact and Non-Contact sheet resistance measurement systems for implantation, diffusion, metallization, and many other applications.

Substrate and tape total and individual thicknesses, warpage, and TTV Measurement. Able to measure with or without backing tape. For wafer back-grind and etch thinning processes control. Non-contact Echoprobe or VITE Technology. Thin film and surface roughness options.